Working Location
ZiZhu Hi-tech Park, No.555 Dongchuan Rd. Minhang District, Shanghai
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ZiZhu Hi-tech Park, No.555 Dongchuan Rd. Minhang District, Shanghai
1. Design and simulation of PMIC with focus on : Buck, Boost, LDO, charger, LED driver, Charge pump, Class D amplifier, etc.
2. Work with layout engineer to finish and optimize layout design.
3. Use lab equipment to characterize PMIC product to meet design spec.
4. Work with application engineer to support customer application.
5. Application note and datasheet preparation.
1. Master degree of microelectronics, electrical engineering or relevant, 1~5 years work experiences at least.
2. Solid understanding on analog circuit design including transistor behavior, model, bandgap, OP-AMP compensation, etc.
3. Solid understanding of power management IP , such as buck converter, boost converter, Charger, LDO, LED driver, Charge Pump, Class D amplifier.
4. Good understanding of semiconductor technology, device structure, etc.
5. Familiar with EDA tools, such as Cadence Virtuoso, Spectre, Spice, Ams, VCS simulation, etc.
6. Familiar with lab equipment such as power supply, multi-meters, Oscilloscope, etc.
1. Participate in IP and chip level architecture definition, derive functional and design specifications and analyse feasibility of technical and architectures.
2. Implement design with Verilog to achieve specification goals. Simulate and debug the codes in the coding stage.
3. Go through the frontend design flow to deliver qualified netlist. Co-work with back-end team to fix timing issue and check floor-plan.
4. Write ASIC specific part of test plan. Prove functional correctness from block level to top-level
5. Design for verification (assertion-based design strategies, code coverage, functional coverage, test plan, etc.)
6. Support firmware/software bring-up and debugging.
7. Work as the technical contact point on the ASIC area.
8. Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency.
1. 2+ years of experience with Master degree or 4+ years of experience with Bachelor degree.
2. Strong RTL coding and familiar with front-end design flow.
3. Proven experience on synthesis, timing analysis and formal verification.
4. Should be familiar with shell/perl/tcl programming in linux OS.
5. Experience in mixed signal team is a plus, knowledge of analog design is a big plus.
6. Experience in power management chip design is a plus.
7. Good communication skills and fluent English.
1. Analog and mixed-signal circuit layout design based on circuit schematic.
2. Work with circuit design engineers to optimize layout to ensure optimal circuit performance.
3. Complete layout physical verification.
4. Complete the Sign-off process and inspection, and write layout design documents.
1. Bachelor degree or above in electronics related major.
2. 3 years of experience in layout design, experience with actual tape out is preferred.
3. Familiar with ESD, Latch Up principle and corresponding layout prevention measures.
4. Have good learning ability, communication and coordination skills and team spirit.
1. Finish digital implementation domain including Floorplan, P&R, STA, Physical verification, DFM.
2. Complete large sized design implementation tasks of ASIC, co-work with circuit design engineers.
1. Must have BS degree with 3+ years of applicable experience.
2. Have a solid background in circuits, electronics & physics.
3. Essential that the individual demonstrates strong communication, verbal and written.
4. Requires good communication skills in English.
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